Electronics Engineer Silicon Sensors R&D

Dense tracking environments in experiments at CERN’s High-Luminosity LHC and future FCC experiments require increased use of timing information in addition to the position measurements provided by pixel detectors. This adds an extra dimension to the available information and is essential for mitigating pile-up effects at high luminosities. The CASSIA Project (CMOS Active SenSor with Internal Amplification) aims to develop monolithic active pixel sensors (MAPS) with internal signal gain and low noise in a widely used CMOS imaging process, targeting a broad range of applications.

Your responsibilities

• Assemble and test CASSIA sensor prototypes on PCBs.
• Support and improve signal measurements in laboratory measurements, irradiations and test beams.
• Analyse CASSIA2 for optimal signal collection and time resolution.
• Investigate radiation hardness and the change of gain as a function of irradiation.
• Test CASSIA2 on chip amplifier circuits against circuit simulation, characterise the front-end (FE) circuit performance for time resolution and signal-to-noise ratio (SNR).
• Improve the design of CASSIA2 circuits for optimal time resolution in LGAD and SPAD mode.
• Develop concepts for integration of CASSIA pixel designs into asynchronous readout pixel circuits in matrices (CASSIA3 studies).
• Circuit design and implementation, design verification, pre-/post-layout simulations for optimised pixel designs and FE-circuits for large matrices.
• Collaborate closely with engineers, physicists, and technicians in a multidisciplinary team.

Your profile

• Experience with the assembly, testing, and characterisation of silicon detector modules or similar systems.
• Practical experience with laboratory instrumentation such as probe stations, laser test setups, beam test setups.
• Ability to design PCBs for ASICs/sensors as part of the test system.
• Ability to perform electronic measurements to characterise analogue and digital on-chip circuits.

Your skills

• Knowledge of monolithic CMOS sensors, MAPS, silicon pixel detectors for high energy physics experiments.
• Experience in testing silicon sensors and required laboratory equipment.
• Experience in circuit simulation and characterisation.
• Working experience in ASIC and/or CMOS sensor design and using industry tools for design, implementation, and verification.

Be sure to meet the eligibility criteria

• You are a national of a CERN Member State or Associate Member State. Currently, we cannot consider applications from Pakistani and Lithuanian nationals for positions with a 2026 start date, as the ceiling defined under Article II.5 of the Associate Membership Agreement has been reached.
• By the application deadline, you have a master’s degree with 2 to 6 years of professional experience since graduation or a PhD with a maximum of 3 years of professional experience since graduation. You are not eligible with only a bachelor’s degree.
• You have never had a CERN fellow or graduate contract before.
• Please pay attention to the additional criteria and requirements for this specific position and mentioned above.